AMD has introduced Versal tamper-resistant devices for security-critical systems. The chips are designed to protect against physical attacks on the silicon backside.
The new products extend the Versal AI Edge Series Gen 2 range. They target customers in defence, critical infrastructure, data centre networking and financial technology that need stronger hardware-level protection.
AMD says the devices are the first adaptive SoC or FPGA-based products with built-in protection against backside physical attacks. The design uses a sensor-based protection die bonded to the main compute die with 3D active-on-active technology. This shields the entire backside of the device and prevents boot if the protection die is tampered with or removed.
Physical attacks on chips are a growing concern for operators of systems that process sensitive information. In many cases, organisations rely on custom combinations of enclosures, application-specific chips and other board-level measures to protect hardware, adding cost and design complexity.
The Versal TR line combines this protection with the existing processing architecture used in the AI Edge family. The devices integrate Arm CPUs, AI Engines, programmable logic, hard IP and connectivity in a single package.
Security features
Alongside the backside protection layer, the devices include a broader set of security functions. These include expanded hardware acceleration for post-quantum cryptography, with support for Module-Lattice-Based Digital Signature Algorithm and Stateless Hash-Based Digital Signature Algorithm.
The chips also support a hybrid boot flow that allows multiple signature algorithms. AMD has also updated the application security unit key vault and added a memory element aging sensor intended to provide extra safeguards for cryptographic keys.
Another change is glitch detection, which is relevant to attacks that try to disrupt chip behaviour by manipulating electrical conditions. AMD says the new devices combine updates to the existing Versal glitch detector with an additional orthogonal glitch detector, including coverage for glitches occurring simultaneously across two voltage rails.
The product range will consist of three devices: 2VE3358TR, 2VE3558TR and 2VE3858TR. The parts are intended to offer a common platform for customers with different performance and cost requirements.
Development path
AMD is also positioning the range around design continuity. Each tamper-resistant device has a footprint-compatible standard counterpart already available in the Versal AI Edge Series Gen 2 family, allowing customers to begin development on existing parts before moving to the tamper-resistant versions.
Customers making that transition should be able to move to the new devices with minimal effort and without rerunning synthesis or place and route. That approach may appeal to organisations working on long development cycles in regulated or security-sensitive markets.
In performance terms, AMD says the devices deliver up to 229,000 DMIPS of scalar compute, up to 369 INT8 TOPS and up to 543,000 LUTs. The company is targeting applications that need both strong device-level protection and substantial on-chip processing.
Kirk Saban, corporate vice president of product, software and solutions at AMD Embedded, outlined the rationale for the launch.
"Protecting critical information requires continued innovation in silicon security capabilities to stay ahead of emerging threats. With Versal tamper-resistant devices, AMD is bringing built-in protection against physical attacks together with high-performance heterogeneous compute in a commercial adaptive SoC, helping customers simplify the development of security-critical systems while maintaining the performance and flexibility their applications demand," he said.
AMD expects the first Versal TR devices to sample in the second half of 2027, with production planned for the first half of 2028.